HDI (High Density Interconnect) printed circuit board is a high-precision circuit board with a line width/line spacing of ≤ 100 μ m (usually 50-75 μ m), blind/buried via, and ≥ 8 layers. It is widely used in 5G communication, smartphones, AI chip carrier boards, and other scenarios. The production process needs to break through the three major technical bottlenecks of micro hole processing, high-precision alignment, and high thickness to diameter ratio electroplating. The following provides a detailed explanation from three aspects: material selection, core processes, and process parameters:

1、 HDI MATERIAL SELECTION: A BASIC CARRIER ADAPTED TO HIGH-PRECISION CHARACTERISTICS

HDI has strict requirements for the dimensional stability, coefficient of thermal expansion (CTE), and dielectric properties (Dk/Df) of materials, and the selection should be based on signal frequency (such as RF/high-speed digital) and reliability requirements

1. CORE BOARD

Substrate type: FR4 for conventional HDI (Tg ≥ 150 ℃, low CTE ≤ 17ppm/℃); High frequency scenarios (such as 5G millimeter wave) use Rogers RO4350B (Df ≤ 0.0037) or Panasonic Megtron 6 (Df ≤ 0.002);

Thickness accuracy: The thickness deviation of the core board is ≤± 5 μ m (conventional board is ≤± 10 μ m), avoiding uneven thickness of the dielectric after lamination (affecting impedance);

Copper foil specifications: The inner layer is made of rolled copper (RA copper, surface roughness Ra ≤ 0.5 μ m), and the outer layer is made of electrolytic copper (ED copper, strong adhesion with dry film). The thickness is usually 0.5oz (17 μ m) or 0.35oz (12 μ m) (ultra-thin copper is used for fine circuits).

2. Prepreg (PP)

Model matching: HDI commonly uses 1080 (ultra-thin resin, thickness 0.071mm), 2116 (medium thick resin, 0.114mm), avoid using 7628 (thick resin, easy to flow adhesive);

Resin content (RC): It needs to be matched with the thickness of the core board (for example, when the core board thickness is 0.1mm, the RC of PP is 45% -50%), to ensure accurate thickness of the medium after compression (error ≤± 5%);

Pre solidification degree (Flow): Low flow PP (Flow ≤ 25%) to prevent interlayer misalignment caused by resin flow during compression ("flow adhesive").

2、 HDI CORE PRODUCTION PROCESS: PRECISION MANUFACTURING FROM INNER LAYER TO FINISHED PRODUCT

1. Inner layer production: the cornerstone of high-precision circuits

The inner layer is the "skeleton" of HDI, which requires fine lines (line width/line spacing ≤ 75 μ m) to be formed through graphic transfer, oxidation treatment, and inner layer etching. The key processes are as follows:

Inner layer graphic transfer:

Coating photosensitive adhesive: using dry film (DF, thickness 25 μ m) or wet film (Wet Film, thickness 15 μ m), with a dry film surface tension of ≤ 30 dyn/cm (to avoid bubbles);

Exposure and development: using LDI laser for direct imaging (resolution ≤ 20 μ m), replacing traditional film (resolution ≤ 50 μ m), with an exposure energy of 80-100mJ/cm ² (matching dry film thickness);

Key parameters: Inner layer line width tolerance ≤ ± 10% (conventional board ± 15%), line spacing ≥ 3 times line width (to avoid side corrosion short circuit).

Inner layer oxidation treatment:

Black Oxidation: NaOH+KMnO ₄ solution is oxidized to form a CuO/Cu ₂ O mixed layer (thickness 0.5-1 μ m) on the copper surface, with Ra=0.8-1.2 μ m, enhancing the bonding strength with PP;

Brown Oxidation: A solution of H ₂ SO ₄+K ₄ [Fe (CN) ₆] generates Cu ₂ O nanowires (thickness 0.3-0.5 μ m) with Ra=0.5-0.8 μ m, which is more environmentally friendly and compatible with low CTE materials.

Inner layer etching:

Etch Factor: Line width/side etching amount ≥ 3:1 (conventional board 2:1), side etching rate ≤ 15% (to avoid thinning of the circuit);

Micro etching control: After etching, use sodium persulfate+sulfuric acid micro etching (Ra=0.3-0.5 μ m) to provide a rough interface for the transfer of outer layer graphics.

2. Drilling and buried hole production: three-dimensional interconnected "channels"

The core feature of HDI is Blind/Buried Via, which requires interlayer electrical connection through mechanical drilling, laser drilling, and hole metallization

Mechanical drilling (through-hole/buried hole):

Aperture range: buried hole diameter 0.1-0.2mm (blind hole diameter 0.05-0.15mm), plate thickness ≤ 3mm (to avoid insufficient copper thickness on the hole wall);

Drilling parameters: rotation speed S=150000-200000rpm (small aperture), feed rate F=0.005-0.01mm/r (reducing tool breakage), hole wall roughness Ra ≤ 3 μ m (avoiding electroplating voids).

Laser drilling (blind/micro holes):

Equipment selection: UV laser (wavelength 355nm, spot diameter ≤ 15 μ m) is used for 0.05-0.2mm micropores; CO ₂ laser (wavelength 10.6 μ m) is used for 0.1-0.5mm holes;

Heat affected zone (HAZ): ≤ 50 μ m (to avoid burning the inner circuit), pulse frequency (50-100kHz) and power (5-15W) need to be adjusted;

Hole type control: taper ≥ 10 ° (ensuring electroplating filling effect), hole wall roughness Ra ≤ 2 μ m (reducing electroplating defects).

Hole metallization (PTH/graphic plating):

Full Plate Electroplating (PTH): Thin copper (0.5-1 μ m) is deposited on the hole wall using a highly dispersed electroplating solution (copper sulfate+sulfuric acid+chloride ions) with a current density of 1.5-3A/dm ²;

Graphic electroplating: Thickened copper plating on the outer layer of the circuit (to the target thickness, such as 1oz substrate needs to be plated to 2oz), additive ratio: leveling agent (polyethylene glycol PEG) 0.1-0.3mL/L, accelerator (chloride ion Cl ⁻) 50-100ppm, inhibitor (thiourea) 0.5-1mL/L (to inhibit the "dog bone" effect);

Thickness control: The thickness of the hole copper should be ≥ 0.8mil (1mil=25.4 μ m), the thickness of the surface copper should be ≥ 1mil (≥ 1.5mil for high layers), and the deviation of the entire plate copper thickness should be ≤ ± 5% (monitored by X-ray thickness gauge).

3. LAYERING PROCESS: THE "BONDING ART" OF MULTI-LAYER CASCADING

HDI lamination requires high-precision registration and low resin flow, with the core process being:

Stack Up Design:

Symmetry: The core board and PP sheet are symmetrically distributed (such as the same material for the first and eighth layers) to avoid warping after compression (Warpage ≤ 0.3%);

Dielectric thickness matching: Total dielectric thickness=∑ PP thickness+core plate thickness, calculated according to impedance requirements (such as 50 Ω differential line dielectric thickness deviation ≤± 3%);

Process edge and positioning hole: Reserve 5-8mm process edge (including Mark points and positioning holes) at the edge, with a hole diameter tolerance of ± 0.03mm (laser alignment accuracy requirement).

Vacuum lamination parameters:

Temperature: The curing temperature of epoxy resin is 170-180 ℃ (phenolic resin is 150-160 ℃), and the heating rate is ≤ 3 ℃/min (to avoid premature flow of PP);

Pressure: Initial pressure 0.5-1MPa (discharge air), peak pressure 3-4MPa (ensure adhesion), holding time 60-90 minutes (resin fully cured);

Vacuum degree: Vacuum ≤ -0.095MPa (to prevent residual bubbles, HDI vacuum degree is twice higher than conventional boards).

Inter layer registration:

Equipment: Laser alignment system (such as Orbotech Laser Alignment), measuring the offset of each layer's Mark points (4-8 points/layer);

Tolerance: Inner layer alignment is ≤± 15 μ m (conventional board is ≤± 25 μ m), outer layer alignment is ≤± 10 μ m (HDI high-precision board is ≤± 8 μ m).

4. OUTER LAYER PRODUCTION AND SURFACE TREATMENT: FUNCTIONALIZED "FINAL DECORATION"

The outer layer needs to complete the transfer of circuit graphics and surface treatment to meet the requirements of solderability and protection:

Outer graphic transfer:

Coating photosensitive adhesive: dry film thickness of 17 μ m (12 μ m for fine circuits), film temperature of 100-120 ℃ (to avoid wrinkling);

Exposure development: LDI laser imaging (resolution ≤ 15 μ m), exposure energy 90-110mJ/cm ² (matching ultra-thin dry film).

Surface treatment process:

Chemical nickel deposition gold (ENIG): most suitable for HDI fine pins (such as BGA, QFP), nickel layer 3-5 μ m (to prevent copper diffusion), gold layer 0.05-0.1 μ m (only covering the surface of the nickel layer); It is necessary to control the pH value between 4.5-5.5 and the temperature between 80-85 ℃ to avoid a "black pad" caused by abnormal phosphorus content in the nickel layer;

Immersion Ag: Low cost (3-8 yuan/㎡), thickness 0.1-0.3 μ m, suitable for short-term testing (storage period ≤ 3 months);

OSP (Organic Solderability Protective Agent): Thickness of 0.2-0.5 μ m, low cost (1-3 yuan/㎡), but short protection period (≤ 1 month), requiring strict control of storage environment (humidity ≤ 40%, temperature ≤ 25 ℃).

5. DETECTION AND VERIFICATION: THE "LAST LINE OF DEFENSE" FOR RELIABILITY

HDI needs to verify its performance through multidimensional testing, with key items including:

Inter layer alignment detection: X-Ray drilling machines (such as Hitachi X-6000) measure the Mark point offset, with the inner layer being ≤± 15 μ m and the outer layer being ≤± 10 μ m;

Micro hole detection: AOI (Automatic Optical Inspection) or X-Ray hole wall analyzer, check the hole shape (taper ≥ 10 °) and hole wall roughness (Ra ≤ 2 μ m);

Electrical performance testing: TDR (Time Domain Reflectometer) impedance measurement (50 Ω± 5%, 100 Ω± 5%), voltage withstand test (1.5 times rated voltage, continuous for 1 minute without breakdown);

Mechanical performance testing: board warping tester to measure warpage (≤ 0.3%), cold and hot impact testing (500 cycles at -55 ℃~125 ℃, no delamination/cracking);

Reliability testing: High frequency signal testing (such as 28GHz millimeter wave, insertion loss ≤ 3dB), wet heat aging (85 ℃/85% RH for 1000 hours, insulation resistance ≥ 100M Ω).

SUMMARY: THE CORE LOGIC OF HDI PRODUCTION

HDI production is a precision collaborative engineering of materials, processes, equipment, and testing. Its key lies in achieving high dimensional stability through ultra-thin copper foil and low flow PP, breaking through micro pore limits through laser drilling and graphic electroplating, vacuum lamination and precision alignment to ensure interlayer interconnection, and ultimately achieving the performance goals of "high density, high reliability, and high integration". With the development of 5G/6G and AI chips, HDI is evolving towards finer lines (≤ 30 μ m), higher layers (≥ 20 layers), and lower Df (≤ 0.002), promoting continuous innovation in production processes.